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Astera Labs Unlocks Next-Gen Cloud Connectivity with Aries PCIe庐 5.0 and CXL鈩
2022年03月14日 11:16:07来源:作者:

First-to-market Aries Smart Retimers successfully complete interoperability testing with all major PCIe 5.0 solutions

SANTA CLARA, Calif. -- (BUSINESS WIRE) --

Astera Labs, a pioneer in connectivity solutions for intelligent systems, today announced that its Aries Smart Retimers for PCI Express® (PCIe®) 5.0 and Compute Express Link™ (CXL™) 2.0 have now entered mass production. The first-to-market Aries Smart Retimer portfolio successfully completed rigorous interoperability testing with key industry partners across a wide variety of PCIe 5.0 processor, FPGA, accelerated computing, GPU, networking, storage, and switch SoCs, paving the way for wide-spread deployment in enterprise data centers and the cloud.

“PCIe 5.0 and CXL technologies are key building blocks to address the high-speed connectivity requirements of next-generation servers running intelligent workloads in the cloud,” said Jitendra Mohan, CEO, Astera Labs. “Production release and successful cross-vendor interoperability testing of our Aries Smart Retimers will support a smooth transition to higher-bandwidth interconnects with purpose-built fleet management features.”

Aries PCIe 5.0 and CXL 2.0 Smart Retimers overcome signal integrity issues to enable up to 32 Gbps, sub-10ns latency, and built-in fleet management with deep diagnostic capabilities critical for large scale enterprise and cloud server deployments.

“Today’s workload optimized infrastructure demands not only high-bandwidth, low-latency PCIe 5.0 and CXL interconnects, but also robust interoperability between all components within increasingly complex server topologies,” said Brian Kelleher, Senior VP of Products, Hardware Engineering, NVIDIA. “Working with leading ecosystem partners and solutions, like Astera Labs and their Aries Smart Retimers, is key to ensuring seamless deployment of our advanced AI platforms at scale.”

Astera Labs’ Cloud-Scale Interop Lab provides rigorous testing to establish robust interoperability between Aries Smart Retimers and an exhaustive sampling of PCIe/CXL root complexes and endpoints, allowing customers to design with confidence and reduce overall development time and effort.

“Broadcom worked closely with Astera Labs to enable seamless interoperability between its Aries PCIe 5.0 Smart Retimer and our PEX89000 switch chip,” said Jas Tremblay, VP and General Manager of the Data Center Solutions Group, Broadcom. “Together, our plug-and-play solutions will facilitate the industry’s wide-spread adoption of PCIe 5.0 connectivity in high-performance, next-generation servers to unlock data-intensive workloads such as AI, Machine Learning, and Cloud Computing.”

“Samsung has strengthened its position as the industry leader in cutting-edge storage technology with the groundbreaking PCIe 5.0 PM1743 SSD for enterprise servers,” said Soonjae Won, Corporate VP of Solution Product & Development, Samsung Electronics. “Our collaboration with Astera Labs and its Aries Smart Retimers ensures unmatched enterprise PCIe 5.0 storage performance and reliability as the ecosystem begins to emerge.”

Availability:

Aries PCIe 5.0 and CXL 2.0 Smart Retimers are available for purchase on www.AsteraLabs.com/Aries ­­ in x8 (PT5081L) and x16 (PT5161L) PCIe lane configurations. Visit www.AsteraLabs.com or contact info@AsteraLabs.com for more information on its PCIe 5.0 and CXL 2.0 connectivity solutions.

Resources:

  • Interop Bulletin #4: Deploy Robust PCIe 5.0 Connectivity with Aries Smart Retimers (VIDEO)
  • Unlock the Full Potential of CXL with Purpose-Built Connectivity Solutions from Astera Labs (VIDEO)
  • Intel Innovation 2021: Astera Labs, Broadcom, Intel, and Samsung PCI Express 5.0 Demo (VIDEO)
  • Aries CXL Smart Retimer Demo: CXL Ecosystem Interop with Intel and Synopsys (VIDEO)
  • Aries Smart Retimer for PCIe 5.0 and CXL (VIDEO)
  • Seamless Transition to PCIe 5.0 Technology in System Implementations (WEBINAR)

Astera Labs will demonstrate its Aries PCIe 5.0 Smart Retimer and other purpose-built connectivity solutions at DesignCon 2022 (Booth #524), April 5-7 in Santa Clara, CA. To schedule a meeting, contact info@AsteraLabs.com.

About Astera Labs

Astera Labs Inc., a fabless semiconductor company headquartered in the heart of California’s Silicon Valley, is a leader in purpose-built connectivity solutions for data-centric systems throughout the data center. The company’s product portfolio includes system-aware semiconductor integrated circuits, boards, and services to enable robust CXL, PCIe, and Ethernet connectivity. For more information about Astera Labs including open positions, visit www.AsteraLabs.com.

PCI Express® and PCIe® are trademarks or registered trademarks of PCI-SIG.
Compute Express Link™ and CXL™ are trademarks of the CXL™ Consortium.

View source version on businesswire.com: https://www.businesswire.com/news/home/20220307006033/en/

CONTACT:

Joe Balich
astera@nereus-worldwide.com

责任编辑: admin

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